Genetic Spot Optimization for Peak Power Estimation in Large VLSI Circuits

نویسنده

  • Michael S. Hsiao
چکیده

Estimating peak power involves optimization of the circuit’s switching function. The switching of a given gate is not only dependent on the output capacitance of the node, but also heavily dependent on the gate delays in the circuit, since multiple switching events can result from uneven circuit delay paths in the circuit. Genetic spot expansion and optimization are proposed in this paper to estimate tight peak power bounds for large sequential circuits. The optimization spot shifts and expands dynamically based on the maximum power potential (MPP) of the nodes under optimization. Four genetic spot optimization heuristics are studied for sequential circuits. Experimental results showed an average of 70.7% tighter peak power bounds for large sequential benchmark circuits was achieved in short execution times.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

A Survey of VLSI Techniques for Power Optimization and Estimation of Optimization

With the advancement in compact, portable and high-density micro-electronic devices and systems, the power dissipated in very large scale integrated (VLSI) design circuits has become a critical concern. Accuracy and efficiency in power estimation involvedin the design phase is important in order to meet power specifications without high cost redesign process. This paper, presents a review of th...

متن کامل

Peak power estimation of VLSI circuits: new peak power measures

New measures of peak power are proposed in the context of sequential circuits, and an efficient automatic procedure is presented to obtain very good lower bounds on these measures, as well as providing the actual input vectors that attain such bounds. Automatic generation of a functional vector loop for near-worst case power consumption is also attained. Experiments show that vector sequences g...

متن کامل

Spice Compatible Model for Multiple Coupled Nonuniform Transmission Lines Application in Transient Analysis of VLSI Circuits

An SPICE compatible model for multiple coupled nonuniform lossless transmission lines (TL's) is presented. The method of the modeling is based on the steplines approximation of the nonuniform TLs and quasi-TEM assumptions. Using steplines approximation the system of coupled nonuniform TLs is subdivided into arbitrary large number of coupled uniform lines (steplines) with different characteristi...

متن کامل

Test Power Reduction by Simultaneous Don’t Care Filling and Ordering of Test Patterns Considering Pattern Dependency

Estimating and minimizing the maximum power dissipation during testing is an important task in VLSI circuit realization since the power value affects the reliability of the circuits. Therefore during testing a methodology should be adopted to minimize power consumption. Test patterns generated with –D 1 option of ATALANTA contains don’t care bits (x bits). By suitable filling of don’t cares can...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:
  • VLSI Design

دوره 2002  شماره 

صفحات  -

تاریخ انتشار 2002